Hermetic sealing is important for many microelectronic devices requiring protection from ambient conditions such as humidity, contamination, and the like. Hermeticity enhances overall device reliability. Further, for flip chip packages, hermeticity enhances the fatigue life of the device-to-substrate interconnections. Without hermeticity, flip chip packages with large chips (for example, &gt;10 mm sq.) would require a polymer encapsulant underneath the device for enhanced interconnection fatigue life. Such encapsulant, however, renders the package non-reworkable.
There are a few ways to achieve hermeticity. One conventional method is to mechanically seal a metal lid (e.g. Al or Cu) to the substrate via a C-ring as illustrated in FIG. 9. In FIG. 9, integrated circuit chip 912 is bonded to substrate 900. Piston 910 contacts the surface of each integrated circuit chip 912 and conducts heat away from integrated circuit chip 912 to housing 904. Cold plate 906 is attached to the top of housing 904 and conducts heat from housing 904 by using water (or other coolant) injected into port 914. C-ring 902 seals substrate 900 between base plate 908 and housing 904. This design, introduced by International Business Machines Corporation in the early 1980's, is referred to as a thermal conduction module (TCM) and is described in Thermal Conduction Module: A High-Performance Multilayer Ceramic Package, by A. J. Blodgett and D. R. Barbour, IBM J. Res. Develop., Vol. 26, No. 1, January 1982, and is incorporated herein by reference. Due to its complexity, the TCM is typically used for high-performance, large-size, multi-chip modules (MCM's).
Another method of hermetic sealing involves soldering the lid to the substrate. This requires a matched coefficient of thermal expansion (CTE) between the lid and the substrate to reduce solder cracking during thermal cycling. For this purpose, the lid material is typically made of ceramic to match the CTE of the ceramic substrate.
A third method used to achieve hermeticity uses a seam sealing technique, where a lid is brazed to the substrate via localized resistance heating. Conventional packaging techniques for such devices (e.g., seam welding of metallic lids to flat packages or flatpacks) often require labor-intensive manual procedures which do not lend themselves to automated production techniques. It has been especially uneconomical and impractical to provide automated mass production techniques for localized heating to the seal area itself without heating the package and the device contained in the package.
When using solder sealing techniques, the whole assembly is placed into an oven where temperatures must exceed the melting temperature of the solder material to ensure complete solder wetting. For eutectic lead-tin solder, having a melting temperature of 180.degree. C., the module is subjected to temperatures around 220-240.degree. C. for a few minutes. Obviously, solders with higher melting temperatures (e.g., gold-tin alloys) are more likely to induce damage to interface coolant and controlled collapse chip connections (C4) during the sealing process. In addition, high temperature alloys, such as gold-tin alloys, are not cost effective.
Microelectronic circuits incorporating ceramic substrates are often enclosed within an hermetically sealed package or housing that provides support and protection for the circuit. A number of electronic components and interconnecting metallizations are attached to a substrate. The packages are hermetically sealed by a cover or lid over the substrate that surround the chips. The material most commonly used for both the housing or lid is a Kovar.RTM. alloy manufactured by the General Electric Company, with a composition of 53% iron, 29% nickel, and 18% cobalt; an optional gold or nickel plating may be added to prevent corrosion. The lids are welded or soldered to the upper surface of the package, thereby hermetically sealing the packages.
Conventional lids are typically formed as simple flat plates, or in "hat-shaped" configurations in which the lid is elevated above the upper edges of the package. The lid cannot be too thin because the lid must be able to withstand substantial loading. Heavy loading is encountered particularly before shipment, when the assembled circuit packages are tested to confirm the hermeticity of the seal. One such test is the helium leak test. During this test, the package is subjected to a significant pressure that can cause the lid to deflect downward toward the interior circuitry which it is designed to protect. An excessive downward deflection can cause shorting, damage to the electrical components, or both and can also induce an excess stress in the weld seals that results in seal failure and reduces the overall rigidity of the structure. The lid is also affected by the stress encountered during thermal cycling of the structure.
One way to strengthen the lid is to make it thicker. This solution increases both the package weight, however, and the overall size of the lid. In addition, the thermal performance of the lid degrades severely due to the very poor thermal conductivity of the Kovar.RTM. material. Another approach is to increase the height of the package to maintain the necessary clearance above the electrical components and circuit traces under maximum lid depression. This solution adds undesirable volume to the package, however, exceeding the volume needed for the actual circuitry, and may violate height restrictions.
It is known that an integrated circuit chip generates heat while the chip is operating. Thus, the problem arises of how to prevent the temperature of the chip from exceeding a certain maximum level at which the chip begins to degrade in reliability or performance.
Heat removal from semiconductor devices is required for both device functionality and reliability. For wire bond packages, the devices are typically bonded to the substrate with thermal adhesives. The primary heat transfer path for this type of package is through the substrate which, in general, is a poor heat conductor. For flip chip packages, however, there are two parallel paths for heat removal from the devices. One path is from the device to the substrate through the solder interconnections; the other path is from the back of the chip to the module lid. A heat transfer medium may also be disposed between the back of the chip and the lid to enhance heat conduction or heat transfer between the chip and the lid. One such heat transfer medium is a thermal paste.
U.S. Pat. No. 5,323,294 issued to Layton et al. discloses a compliant body with microscopic voids containing a liquid metal alloy. As shown in FIG. 10, compliant body 1006 containing a liquid metal alloy is pressed between integrated circuit chip 1002 and lid 1004 with heatsink 1014. Integrated circuit chip 1002 is attached to substrate 1000, having interconnect pins 1012, by chip terminals 1008. Lid 1004 is attached to substrate 1000 by lid bond 1110. This device does not seam seal integrated circuit chip 1002. In addition, integrated circuit chip 1002 and lid 1004 are subject to deterioration and attack due to the liquid metal alloy reacting with integrated circuit chip 1002 and lid 1004.
U.S. Pat. No. 5,414,214 issued to Cho et al. discloses a device which selectively heats the seal area of an encapsulating package by providing a built-in resistive heater circuit in the substrate or the lid to melt and form a seal around a wirebond circuit. This device requires valuable substrate surface area to form the seal and does not provide a mechanism to cool the integrated circuit chip.
Conventional wire bond packages typically provide lower interconnection density between the devices and substrate as compared to the flip chip technology. Thus, wire bond packages are not preferable and typically do not allow for high-power, high-performance devices.